RISC-V Performance Soars to New Heights
Engineered for what comes next
Condor Computing is a U.S.-based R&D subsidiary of Andes Technology, established in 2023 in Austin, Texas, to push the boundaries of open, high-performance, computing. Condor was created with a singular mission: To design the world’s most advanced RISC-V processor IP — from the ground up.
While Andes has long been recognized for power-efficient, highly configurable cores, Condor was established to extend that legacy into performance-driven domains.
Our Mission
Condor’s charter is to architect and design next-generation RISC-V processor IP that delivers uncompromising performance, power efficiency, and innovation — enabling our partners to compete at the frontier of AI, cloud, and data-centric computing.
Who We Are


Why It Matters
As AI, HPC, and edge workloads become more demanding, the world needs an open, scalable compute foundation that’s not tied to legacy architectures. Condor’s roadmap is designed to fill that gap — enabling real-world performance without compromise
Why It Matters
As AI, HPC, and edge workloads become more demanding, the world needs an open, scalable compute foundation that’s not tied to legacy architectures. Condor’s roadmap is designed to fill that gap — enabling real-world performance without compromise

Our Technology
At Condor Computing, we’re not just building processor IP — we’re redefining what’s possible with open instruction set computing. Our architecture is a clean-sheet, out-of-order RISC-V microarchitecture designed to achieve best-in-class performance and power efficiency for today’s most demanding workloads —from AI inference to high-throughput computing in the cloud.
Breakthrough Microarchitecture
Our upcoming processor IP is built around a highly scalable, deeply out-of-order pipeline with the following hallmarks:
Performance, Meet Practicality
Unlike many clean-sheet architectures, Condor’s CPUs are engineered for integration and usability: