In this 2nd edition of the Condor Blog, I am very happy to welcome Thang Tran to the company. Thang is joining Condor as our Chief Technology Officer (CTO). In this role, Thang will oversee the development of our high-performance RISC-V microprocessors, with a special focus on the architecture and microarchitecture of the instruction execution pipelines.

Thang Tran has been designing microprocessors for a long, long time. Across a number of companies, he has led and participated in the design of CPUs based on instruction sets from x86, to ARM, PowerPC, ARC, and RISC-V, as well as several other types of computing engines, like DSPs. Building on his PhD work in Superscalar Microprocessor Architecture, Thang has usually focused on how to most efficiently execute more and more instructions per cycle in a processor.

I had the pleasure of working with Thang back when we were both at Texas Instruments. There, we worked together to help lead the development of the ARM Cortex-A8, the first member of the Cortex family from ARM. I think that with the support and collaboration of a large team at TI and ARM we were able to create a ground-breaking design that led to a great deal of success for the Cortex product line. I look forward to doing this sort of thing again with Thang, as we set out to achieve a new level of performance and power efficiency with the RISC-V ISA.

To welcome Thang and learn more about him, I did the following short interview. Enjoy.

Ty Garibay
President, Condor Computing


What is the most challenging part of designing a new microprocessor?
Every microprocessor that I have designed has had drastically different microarchitectures. The design was done with the market or application in mind. The most challenging is to simplify the complexity.

Does the industry really need another new microprocessor?
Definitely! At one point, I thought that x86 was going to be it, but microprocessors are still very much active today. PPA are the main factors, and RISC-V ISA-based processors can drastically change the PPA along with enabling a whole new ecosystem.

What end markets do you think will see the most growth for processors over the next 5-10 years?
The AI, AR/VR markets are red hot. For X86, it was PC and laptops. For ARM, it was the smartphone. The new era is AI/AR/VR, and RISC-V is primed for this market.

Who else in the industry do you think is designing excellent processors?
There are 2 different market targets for RISC-V startup companies. The system companies like Tenstorrent, Ventana, and Esperanto provide chip solutions. These companies are definitely designing excellent processors for their systems. The IP companies like Andes, SiFive, and Codasip, provide the full range of processor IP from embedded to high-end, but they are working their way up from low end of the performance scale.

What do you focus on the most when designing a new CPU?
I love innovation and simplicity, so my first target is to simplify the complexity while retaining the highest possible performance. The second target is scalability, designing it once for all different instruction issue widths, features, and configurations–the full range of processor IPs at one time.

You have over 160 patents granted already; how do you file so many patents?
As I said earlier, I enjoy doing new things and not getting bored by designing the same microprocessor over and over. Each microprocessor that I have worked on was designed with a different micro-architecture. I focus on microarchitectures that are not “traditional” or “common practice.” My designs embody revolutionary ideas which can generate several patent applications for each new concept.

What makes for a good patent that will get approved?
When a patent examiner can find little or no prior art, then the patent will get approved fairly quickly. My first ever patent was granted in one year without any office action, it is the record. Since I have designed microprocessors for many years, I have become very knowledgeable about prior arts in patent applications.